The present invention relates to fast logic sequential circuits and more particularly to logic coincidence gates with two inputs. It uses either field effect transistors of the normally-on or normally-off types, or bipolar transistors, as a function of the logic circuit type in which the coincidence gate according to the invention is used. However, the dynamic characteristics of the coincidence gate lead to it being used in preferred manner in fast integrated circuits, such as those produced on GaAs or more generally on materials of group III-V.
The invention also relates to circuits using the coincidence gate, particularly frequency divider circuits or shift registers, or also frequency generators with a variable frequency.
The term coincidence or unanimous decision gate is used for a logic gate having at least two inputs, which must be simultaneously activated by logic levels, so that the output of the coincidence gate changes state. The known gates switch solidly and rapidly as a function of the logic signals applied to the inputs. The coincidence gate according to the invention only changes state if the two inputs are activated by the same logic levels (coincidence). In the opposite case (anticoincidence), the gate retains its previous state.
It has two parallel-connected transistors, where the gates, in the case of field effect transistors, constitute the inputs of the coincidence gate. The source of each transistor is grounded and it is supplied by its drain across a resistor. The special feature of the gate according to the invention is that the supply voltages differ for the two transistors. The first transistor is supplied across a first high value saturated resistor from a voltage +V.sub.DD. The second transistor is also supplied across a second saturated resistor, which is identical to the first, but its supply voltage is taken, across a Schottky diode connected in the forward direction i.e., a conductive orientation, at the common point between the first saturated resistor and the first transistor drain. The output of this coincidence gate is sampled at the common point between the Schottky diode and the second saturated resistor and is applied to the gate of a third load resistor of capacitance C. In addition, the supply voltage V.sub.DD is high compared with the sum V.sub.H +V.sub.D, V.sub.H being the high level voltage at the output of the coincidence gate and V.sub.D the voltage drop across the diode in the on state.
What has been stated hereinbefore can be translated into terms of bipolar transistors by replacing the source, gate and drain by the emitter, base and collector respectively.